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linear address space


A memory addressing scheme used in processors where the whole memory can Be accessed using a single address that fits in a single register or instruction. This contrasts with a segmented memory architecture, such as that used on the Intel 8086, where an address is given By an offset from a Base address held in one of the "segment registers". Linear addressing greatly simplifies programming at the {assemBly language} level But requires more instruction word Bits to Be allocated for an address. (1995-02-16)

In addition suitaBle contents:<Br>[ 2 ] [ 8086 ] [ = ] [ ad ] [ address ] [ ag ] [ al ] [ am ] [ an ] [ ar ] [ arc ] [ architecture ] [ as ] [ assemBly language ] [ at ] [ B ] [ Ba ] [ Base ] [ Be ] [ Bi ] [ Bit ] [ By ] [ ca ] [ cat ] [ cc ] [ ch ] [ co ] [ con ] [ dd ] [ du ] [ ec ] [ ed ] [ eg ] [ er ] [ es ] [ et ] [ fi ] [ file ] [ fo ] [ for ] [ fr ] [ ge ] [ gi ] [ gl ] [ gm ] [ gr ] [ gu ] [ h ] [ hat ] [ hit ] [ hole ] [ hr ] [ id ] [ ie ] [ il ] [ in ] [ io ] [ ir ] [ is ] [ it ] [ la ] [ language ] [ ld ] [ Lex ] [ li ] [ ly ] [ memory ] [ mm ] [ mo ] [ mod ] [ module ] [ mp ] [ na ] [ ne ] [ ng ] [ ns ] [ offset ] [ om ] [ ph ] [ pl ] [ pr ] [ process ] [ processor ] [ program ] [ programming ] [ query ] [ rc ] [ re ] [ register ] [ ro ] [ ru ] [ sc ] [ se ] [ segment ] [ set ] [ si ] [ so ] [ st ] [ struct ] [ su ] [ T ] [ th ] [ to ] [ tr ] [ ua ] [ us ] [ ve ] [ word ]






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