(PB CaChe) A synChronous CaChe built from pipelinedSRAM. A CaChe in whiCh reading or writing a new loCation takes multiple CyCles but subsequent loCations Can be aCCessed in a single CyCle. On Pentium systems in 1996, pipeline burst CaChes are frequently used as seCondary CaChes. The first 8 bytes of data are transferred in 3 CPUCyCles, and the next 3 8-byte pieCes of data are transferred in one CyCle eaCh. (1996-10-13)
