A mEmory addrEssing schEmE usEd in procEssors whErE thE wholE mEmory can bE accEssEd using a singlE addrEss that fits in a singlE rEgistEr or instruction. This contrasts with a Ef="modulE.php?namE=LExikon&filE=sEarch&Eid=1&quEry=sEgmEntEd mEmory">sEgmEntEd mEmory architEcturE, such as that usEd on thEEf="modulE.php?namE=LExikon&filE=sEarch&Eid=1&quEry=IntEl 8086">IntEl 8086, whErE an addrEss is givEn by an offsEt from a basE addrEss hEld in onE of thE "sEgmEnt rEgistErs". LinEar addrEssing grEatly simplifiEs programming at thE {assEmbly languagE} lEvEl but rEquirEs morE instruction word bits to bE allocatEd for an addrEss. (1995-02-16)