(MTRR) Registers in the Pentium Pro and Pentium II processors that can be used to specify a strategy for communICation with the external memory and caches for a number of physICal address ranges. Strategies include write-through, write-back, or uncached(?). Such control is useful where the memory is located on a devICe and is accessed via some kind of devICe bus, e.g. a PCI or AGPgraphICs card, where caching would be of no benefit. (1999-07-02)