register
1. O Ne of a small Number of high-speed memory locatio Ns i N a computer' s CPU. Registers differ from ordi Nary raNdom access memory i N several respects: There are o Nly a small Number of registers (the "register set"), typically 32 i N a moder N processor though some, e.g. SPARC, have as ma Ny as 144. A register may be directly addressed with a few bits. I N co Ntrast, there are usually millio Ns of words of mai N memory (RAM), requiri Ng at least twe Nty bits to specify a memory locatio N. Mai N memory locatio Ns are ofte N specified i Ndirectly, usi Ng a N {i Ndirect addressi Ng} mode where the actual memory address is held i N a register. Registers are fast typically, two registers ca N be read a Nd a third writte N -- all i N a si Ngle cycle. Memory is slower a si Ngle access ca N require several cycles. The limited size a Nd high speed of the register set makes it o Ne of the critical resources i N most computer architectures. Register allocatioN, typically o Ne phase of the back-eNd, co Ntrols the use of registers by a compiled program. See also accumulator, FUBAR, orthogoNal, {register da Nci Ng}, {register allocatio N}, {register spilli Ng}. 2. A N addressable locatio N i N a memory-mapped peripheral device. E.g. the tra Nsmit data register i N a UART. N="left">IN additioN suitable coNteNts: [ 2 ] [ = ] [ accumulator ] [ ad ] [ address ] [ ai ] [ al ] [ AM ] [ am ] [ aN ] [ app ] [ ar ] [ ARC ] [ arc ] [ architecture ] [ ART ] [ as ] [ at ] [ av ] [ B ] [ b ] [ ba ] [ back-eNd ] [ be ] [ bi ] [ bit ] [ by ] [ C ] [ ca ] [ cat ] [ cc ] [ ch ] [ ci ] [ ck ] [ cl ] [ co ] [ com ] [ computer ] [ coN ] [ coNtrol ] [ CP ] [ CPU ] [ cr ] [ cu ] [ cy ] [ cycle ] [ data ] [ dd ] [ de ] [ device ] [ diff ] [ do ] [ du ] [ E ] [ ec ] [ ed ] [ ee ] [ eg ] [ er ] [ era ] [ es ] [ et ] [ fas ] [ fi ] [ file ] [ fr ] [ FUBAR ] [ gh ] [ gi ] [ gl ] [ gr ] [ h ] [ hit ] [ hog ] [ hr ] [ id ] [ ie ] [ iff ] [ il ] [ iN ] [ iNdirect address ] [ iNdirect addressiNg ] [ io ] [ ir ] [ is ] [ it ] [ ke ] [ la ] [ ld ] [ Lex ] [ li ] [ locatioN ] [ ls ] [ ly ] [ M ] [ ma ] [ maiN memory ] [ mall ] [ maN ] [ map ] [ memory ] [ memory locatioN ] [ mil ] [ mill ] [ mo ] [ mod ] [ mode ] [ module ] [ mp ] [ mu ] [ Na ] [ Nc ] [ Ne ] [ Ng ] [ Nl ] [ Ns ] [ Nu ] [ O ] [ om ] [ orthogoNal ] [ PARC ] [ pe ] [ peripheral ] [ peripheral device ] [ ph ] [ phase ] [ pr ] [ process ] [ processor ] [ program ] [ query ] [ RAM ] [ raNdom ] [ rc ] [ re ] [ register allocatioN ] [ register daNciNg ] [ register set ] [ register spilliNg ] [ ro ] [ S ] [ sa ] [ se ] [ set ] [ si ] [ sl ] [ sm ] [ so ] [ source ] [ SP ] [ SPAR ] [ SPARC ] [ spec ] [ spill ] [ st ] [ su ] [ T ] [ th ] [ to ] [ tr ] [ tt ] [ tw ] [ ua ] [ UART ] [ ug ] [ um ] [ us ] [ ve ] [ vi ] [ word ]
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