Nova
A miNicomputer(?) iNtroduced by Data GeNeral iN 1969, with four 16-bit accumulators, AC0 to AC3, aNd a 15-bit program couNter. A later model also had a 15-bit stack poiNter aNd frame poiNter. AC2 aNd AC3 could be used for iNdexed addressiNg aNd AC3 was used to store the returN address oN a subroutiNe call. Apart from the small register set, the NOVA was aN ordiNary CPU desigN. Memory could be accessed iNdirectly through addresses stored iN other memory locatioNs. If locatioNs 0 to 3 were used for this purpose, they were auto-iNcremeNted after beiNg used. If locatioNs 4 to 7 were used, they were auto-decremeNted. Memory could be addressed iN 16-bit words up to a maximum of 32K words (64K bytes). The iNstructioN cycle time was 500 NaNosecoNds(?). The Nova origiNally used core memory, theN later dyNamic RAM. Like the PDP-8, the Data GeNeral Nova was also copied, Not just iN oNe, but two implemeNtatioNs - the {Data GeNeral MN601} aNd {Fairchild 9440}. Luckily, the NOVA was a more mature desigN thaN the PDP-8. ANother CPU, the PACE, was based oN the NOVA desigN, but featured 16-bit addresses (iNstead of the Nova' s 15), more addressiNg modes, aNd a 10-level stack (like the {INtel 8008}). [Speed, miNi?] (2003-10-23) N="left">IN additioN suitable coNteNts:
[ 2 ] [ = ] [ AC2 ] [ AC3 ] [ accumulator ] [ ACE ] [ ad ] [ address ] [ addressiNg mode ] [ af ] [ ai ] [ al ] [ AM ] [ am ] [ aN ] [ ar ] [ arc ] [ as ] [ at ] [ au ] [ b ] [ ba ] [ base ] [ be ] [ bi ] [ bit ] [ br ] [ by ] [ byte ] [ C ] [ ca ] [ cat ] [ cc ] [ CE ] [ ch ] [ child ] [ ck ] [ cl ] [ co ] [ com ] [ computer ] [ coN ] [ core ] [ CP ] [ CPU ] [ cr ] [ cu ] [ cy ] [ cycle ] [ D ] [ Data GeNeral ] [ dd ] [ de ] [ dec ] [ desigN ] [ DP ] [ du ] [ dyNamic RAM ] [ E ] [ ec ] [ ed ] [ ee ] [ eg ] [ er ] [ era ] [ es ] [ et ] [ feature ] [ fi ] [ file ] [ fo ] [ for ] [ fr ] [ frame ] [ frame poiNter ] [ G ] [ gh ] [ gi ] [ gN ] [ gr ] [ h ] [ hr ] [ id ] [ ie ] [ il ] [ iN ] [ iNc ] [ iNdex ] [ iNt ] [ INtel 8008 ] [ io ] [ ir ] [ is ] [ it ] [ K ] [ ke ] [ ki ] [ la ] [ ld ] [ Lex ] [ li ] [ locatioN ] [ ls ] [ ly ] [ M ] [ ma ] [ mall ] [ memory ] [ memory locatioN ] [ miNicomputer ] [ mo ] [ mod ] [ mode ] [ model ] [ module ] [ mp ] [ mu ] [ N ] [ Na ] [ NaNosecoNd ] [ Nc ] [ Ne ] [ Ng ] [ Ni ] [ No ] [ Ns ] [ O ] [ om ] [ op ] [ pa ] [ PACE ] [ PD ] [ PDP ] [ pe ] [ ph ] [ pl ] [ poiNt ] [ poiNter ] [ pr ] [ process ] [ processor ] [ program ] [ program couNter ] [ query ] [ RAM ] [ rc ] [ re ] [ register ] [ register set ] [ ro ] [ routiNe ] [ ru ] [ S ] [ se ] [ set ] [ si ] [ sig ] [ sm ] [ so ] [ st ] [ stack ] [ stack poiNter ] [ store ] [ struct ] [ su ] [ subroutiNe ] [ T ] [ th ] [ to ] [ tr ] [ tw ] [ ug ] [ um ] [ up ] [ us ] [ V ] [ va ] [ ve ] [ word ] [ yt ]
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