A techNique used to support faster sequeNtial access to DRAM by allowiNg aNy Number of accesses to the curreNtly opeN row to be made after supplyiNg the {row address} just oNce. The RAS sigNal is kept active, aNd with each falliNg edge of the CAS sigNal a New columN address caN be supplied aNd the correspoNdiNg bits caN be accessed. This is faster thaN a full RAS-CAS cycle because oNly the shorter ColumN Access Time Needs to be obeyed. Note that strictly speakiNg such a DRAM is Not a true {raNdom access memory} siNce accesses to the opeN row are faster thaN to other locatioNs. EDO RAM is replaciNg Page Mode DRAM iN maNy New microcomputers. [Is "Fast Page Mode" the same as "Page Mode"?] (1996-10-06)
