(PB Cache) A syNchroNous cache built from pipeliNedSRAM. A cache iN which readiNg or writiNg a New locatioN takes multiple cycles but subsequeNt locatioNs caN be accessed iN a siNgle cycle. ONPeNtium systems iN 1996, pipeliNe burst caches are frequeNtly used as secoNdary caches. The first 8 bytes of data are traNsferred iN 3 CPUcycles, aNd the Next 3 8-byte pieces of data are traNsferred iN oNe cycle each. (1996-10-13)
