A memORy addressing scheme used in processORs where the whole memORy can be accessed using a single address that fits in a single register OR instruction. This contrasts with a segmented memORy architecture, such as that used on the Intel 8086, where an address is given by an offset from a base address held in one of the "segment registers". Linear addressing greatly simplifies programming at the {assembly language} level but requires mORe instruction wORd bits to be allocated fOR an address. (1995-02-16)