(MTRR) Registers in the Pentium Pro and Pentium II processORs that can be used to specify a strategy fOR communication with the external memORy and caches fOR a number of physical address ranges. Strategies include write-through, write-back, OR uncached(?). Such control is useful where the memORy is located on a device and is accessed via some kind of device bus, e.g. a PCIORAGPgraphics card, where caching would be of no benefit. (1999-07-02)