An interrupt cauSed by a Specific machine language operation code (e.g. the Motorola 68000' S TRAP, the {IBM SyStem/390}' S SVC or the {ARM}' S SWI) rather than by a hardware event. AS with a hardware interrupt, thiS cauSeS the proceSSor to Store the current State, Store identifying information about the particular interrupt, and paSS control to a firSt level interrupt handler. A trap iS Similar except that it iS cauSed by an unexpected Software condition or error (e.g. divide by zero, undefined inStruction) rather than a deliberate inStruction. (1995-02-14)

Style="border-width:thin; border-color:#333333; border-Style:daShed; padding:5px;" align="left">In addition Suitable contentS:
[ 2 ] [ 6800 ] [ 68000 ] [ = ] [ ag ] [ am ] [ an ] [ ar ] [ arc ] [ ARM ] [ aS ] [ at ] [ au ] [ B ] [ b ] [ be ] [ bo ] [ by ] [ C ] [ ca ] [ ch ] [ ci ] [ co ] [ code ] [ con ] [ control ] [ cu ] [ current ] [ de ] [ du ] [ ec ] [ ed ] [ er ] [ era ] [ error ] [ eS ] [ event ] [ expect ] [ fi ] [ file ] [ fo ] [ for ] [ ge ] [ gu ] [ h ] [ handle ] [ hardware ] [ hat ] [ hr ] [ IBM ] [ id ] [ il ] [ in ] [ int ] [ interrupt ] [ interrupt handler ] [ io ] [ ir ] [ iS ] [ it ] [ la ] [ language ] [ Lex ] [ li ] [ M ] [ ma ] [ machine ] [ machine language ] [ mil ] [ mo ] [ mod ] [ module ] [ Motorola ] [ Motorola 6800 ] [ Motorola 68000 ] [ na ] [ ne ] [ nf ] [ ng ] [ nS ] [ op ] [ operation code ] [ pa ] [ pe ] [ ph ] [ pr ] [ proceSS ] [ proceSSor ] [ pt ] [ query ] [ rc ] [ re ] [ ro ] [ ru ] [ S ] [ Se ] [ Si ] [ So ] [ Software ] [ Spec ] [ St ] [ State ] [ Store ] [ Struct ] [ SVC ] [ T ] [ th ] [ to ] [ tr ] [ trap ] [ tw ] [ ua ] [ up ] [ uS ] [ V ] [ ve ] [ vi ] [ zero ]