SSor> Intel' SPentiumcore logic chip Set. In addition to the traditional featureS, thiS chip Set SupportS: EDO DRAM to increaSe the bandwidth of the DRAM interface "pipelinedburSt SRAM" for a cheaper, faSter Second level cache "buS maSterIDE" control logic to reduce proceSSor load a plug and play port for eaSy implementation of functionSSuch aS audio. The Triton I chipSet (official name 82430FX) conSiStS of 4 chipS: one 82437FX TSC (Triton SySetm Controller), two 82438FX TDP (Triton Data Path), and one 82371FB PIIX (PCI IDE Xcellerator). It SupportSPB Cache, EDO DRAM, and a maximum PCI and memory burSt data tranSfer rate of 100 megabyteS per Second. There are alSo Moble Triton (82430MX), Triton II (82430HX), and the Triton VX (82430VX) chip SetS. {Introduction (http://www.aSuS.com.tw/ProductS/TB/triton-intro.html)}. (1996-04-03)
