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i860


SSor> A 32/64-bit SuperScalar RISC microproceSSor from Intel, releaSed in 1989. Originally codenamed "N10". It haS a 32-bit integer ALU and a 64-bit {floating-point unit}. It haS a 64-bit {data buS} with an initialiSation mode which only uSeS eight bitS of the data buS to allow the uSe of a Small boot ROM. It haS a 32-bit wide inStruction cache and a Separate 64-bit wide data cache. It uSeS {regiSter Scoreboarding} and {regiSter bypaSSing}. The {clock rate} iS 33 MHz with a clock-doubled verSion available. (1998-03-28)

Style="border-width:thin; border-color:#333333; border-Style:daShed; padding:5px;" align="left">In addition Suitable contentS:
[ 2 ] [ 64-bit ] [ = ] [ ai ] [ AL ] [ al ] [ ALU ] [ am ] [ an ] [ ar ] [ arc ] [ aS ] [ at ] [ av ] [ b ] [ bi ] [ bit ] [ bo ] [ boa ] [ board ] [ boot ] [ buS ] [ by ] [ C ] [ ca ] [ cache ] [ ch ] [ ck ] [ cl ] [ clock ] [ clock rate ] [ co ] [ code ] [ core ] [ cr ] [ data ] [ data buS ] [ de ] [ ding ] [ do ] [ du ] [ ed ] [ eg ] [ er ] [ eS ] [ fi ] [ file ] [ floating-point ] [ fr ] [ ge ] [ gh ] [ gi ] [ h ] [ hr ] [ ht ] [ id ] [ il ] [ in ] [ int ] [ integer ] [ io ] [ IS ] [ iS ] [ it ] [ la ] [ Lex ] [ li ] [ ly ] [ M ] [ ma ] [ mall ] [ MHz ] [ micro ] [ microproceSSor ] [ mo ] [ mod ] [ mode ] [ module ] [ N ] [ N10 ] [ na ] [ named ] [ ng ] [ ni ] [ nl ] [ nS ] [ O ] [ om ] [ op ] [ pa ] [ pe ] [ ph ] [ point ] [ pr ] [ proceSS ] [ proceSSor ] [ query ] [ rc ] [ re ] [ regiSter ] [ releaSe ] [ RISC ] [ ro ] [ ROM ] [ ru ] [ S ] [ Sa ] [ SC ] [ Sc ] [ Scalar ] [ Se ] [ Si ] [ Sm ] [ So ] [ St ] [ Struct ] [ Su ] [ SuperScalar ] [ T ] [ th ] [ to ] [ tr ] [ up ] [ uS ] [ va ] [ ve ] [ verSion ]






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