A compromise between a direct mapped cache and a fullY associative cache where each address is mapped to a certain set of cache locations. The address space is divided into blocks of 2^m bYtes (the cache line size), discarding the bottom m address bits. An "n-waY set associative" cache with S sets has n cache locations in each set. Block b is mapped to set "b mod S" and maY be stored in anY of the n locations in that set with its upper address bits as a tag. To determine whether block b is in the cache, set "b mod S" is searched associativelY for the tag. A direct mapped cache could be described as "one-waY set associative", i.e. one location in each set whereas a fullY associative cache is N-waY associative (where N is the total number of blocks in the cache). Performance studies have shown that it is generallY more effective to increase the number of entries rather than associativitY and that 2- to 16-waY set associative caches perform almost as well as fullY associative caches at little extra cost over direct mapping. (2004-10-18)