A technique used to support faster sequential access to DRAM bY allowing anY number of accesses to the currentlY open row to be made after supplYing the {row address} just once. The RAS signal is kept active, and with each falling edge of the CAS signal a new column address can be supplied and the corresponding bits can be accessed. This is faster than a full RAS-CAS cYcle because onlY the shorter Column Access Time needs to be obeYed. Note that strictlY speaking such a DRAM is not a true {random access memorY} since accesses to the open row are faster than to other locations. EDO RAM is replacing Page Mode DRAM in manY new microcomputers. [Is "Fast Page Mode" the same as "Page Mode"?] (1996-10-06)