<
architecture, body, electronics, integrated circuit, stand
ards, testing> (JTAG, or "IEEE Stand
ard 1149.1") A
standard specifying how to control and monitor the pins of compliant devices on a
printed circuit board. Each device has four JTAG control lines. There is a common reset (TRST) and clock (TCLK). The data line
daisy chains one device' s TDO pin to the TDI pin on the next device. The
protocol contains commands to read and set the values of the pins (and, optionally
internal registers) of devices. This is called "
boundary scanning". The protocol makes bo
ard testing easier as signals that
are not visible at the bo
ard connector may be read and set. The protocol also allows the testing of equipment, connected to the JTAG port, to identify components on the bo
ard (by reading the device identification register) and to control and monitor the device' s outputs. JTAG is not used during normal operation of a bo
ard.
JTAG Technologies B.V. . {Bound
ary Scan/JTAG Technical Information - Xilinx, Inc. (http://www.xilinx.com/support/techsup/journals/jtag/)}. {Java API for Bound
ary Scan FAQs - Xilinx Inc. (http://www.xilinx.com/products/softw
are/sx/sxfaqs.htm)}. {JTAG Bound
ary-Scan Test Products - Corelis, Inc. (http://www.corelis.com/products/scanovrv.html)}. {"Logic analyzers stamping out bugs at the cutting edge", EDN Access, 1997-04-10 (http://www.ednmag.com/ednmag/reg/1997/041097/08df_02.htm)}. {IEEE 1149.1 Device
architecture - Bound
ary-Scan Tutorial from ASSET InterTech, Inc. (http://www.asset-intertech.com/tutorial/
arch.htm)}. {"Application-Specific Integrated Circuits", Michael John Sebatian Smith, published Addison-Wesley - Design Automation Cafe (http://www.dacafe.com/DACafe/EDATools/EDAbooks/ASIC/Book/CH14/CH14.2.htm)}. {Softw
are Debug options on ASIC cores - Embedded Systems Programming
archive (http://embedded.com/97/feat9701.htm)}. {Designing for On-Bo
ard Programming Using the IEEE 1149.1 (JTAG) Access Port - Intel (http://developer.intel.com/design/flcomp/applnots/292186.htm)}. {Built-In Self-Test Using Bound
ary Scan by Texas Instruments - EDTN Network (http://www.edtn.com/scribe/reference/appnotes/md003e9a.htm)}. (1999-11-15)
In addition suitable contents:
[ 2 ] [ = ] [ Access ] [ ad ] [ ae ] [ af ] [ ag ] [ ai ] [ al ] [ am ] [ an ] [ API ] [ app ] [ Application-Specific Integrated Circuit ] [ aq ] [ ar ] [ arc ] [ architecture ] [ AS ] [ as ] [ ASIC ] [ ASSET ] [ AT ] [ at ] [ av ] [ B ] [ b ] [ ba ] [ be ] [ bo ] [ boa ] [ board ] [ boundary scan ] [ by ] [ C ] [ ca ] [ cat ] [ cc ] [ ch ] [ chain ] [ ci ] [ circuit ] [ ck ] [ CL ] [ cl ] [ clock ] [ co ] [ com ] [ comma ] [ command ] [ component ] [ con ] [ connect ] [ control ] [ core ] [ cr ] [ cu ] [ D ] [ DAC ] [ daisy chain ] [ DAT ] [ data ] [ dd ] [ de ] [ design ] [ developer ] [ device ] [ ding ] [ du ] [ E ] [ ec ] [ ed ] [ EDA ] [ eg ] [ electron ] [ er ] [ era ] [ es ] [ ET ] [ et ] [ FAQ ] [ fi ] [ file ] [ fo ] [ for ] [ fr ] [ G ] [ ge ] [ gi ] [ gn ] [ gr ] [ gs ] [ h ] [ hat ] [ hit ] [ hn ] [ hr ] [ hs ] [ ht ] [ IC ] [ id ] [ IE ] [ ie ] [ IEEE ] [ IEEE Standard 1149.1 ] [ il ] [ in ] [ int ] [ integrated circuit ] [ io ] [ ir ] [ is ] [ it ] [ J ] [ jo ] [ JTAG ] [ K ] [ ke ] [ lc ] [ Lex ] [ li ] [ line ] [ ls ] [ lt ] [ lu ] [ ly ] [ M ] [ ma ] [ man ] [ md ] [ ml ] [ mm ] [ mo ] [ mod ] [ module ] [ monitor ] [ mp ] [ ms ] [ N ] [ na ] [ nc ] [ ne ] [ nf ] [ ng ] [ ni ] [ nn ] [ no ] [ norm ] [ ns ] [ O ] [ om ] [ op ] [ option ] [ output ] [ pe ] [ ph ] [ PI ] [ ping ] [ pl ] [ pm ] [ pn ] [ port ] [ pr ] [ printed circuit board ] [ product ] [ protocol ] [ pt ] [ Q ] [ query ] [ rc ] [ re ] [ reference ] [ register ] [ ro ] [ RS ] [ ru ] [ S ] [ sc ] [ scan ] [ SE ] [ se ] [ Self ] [ SET ] [ set ] [ sh ] [ SI ] [ si ] [ sig ] [ signal ] [ sl ] [ so ] [ software ] [ Spec ] [ spec ] [ SSE ] [ st ] [ standard ] [ su ] [ support ] [ sy ] [ T ] [ TA ] [ tag ] [ TDI ] [ test ] [ testing ] [ Texas Instruments ] [ th ] [ tm ] [ tn ] [ to ] [ tp ] [ tr ] [ tron ] [ TRS ] [ tt ] [ tw ] [ ug ] [ um ] [ up ] [ us ] [ V ] [ va ] [ value ] [ ve ] [ vi ] [ ws ] [ X ] [ Xi ] [ Xilinx, Inc. ]