<electronics> (Or "Scan-In, Scan-Out") A electronic circuit design technique which aims to increase the controllability and observability of a digital ef="module.php?name=Lexikon&file=search&eid=1&query=logic circuit">logic circuit by incorporating special "ef="module.php?name=Lexikon&file=search&eid=1&query=scan register">scan registers" into the circuit so that they form a ef="module.php?name=Lexikon&file=search&eid=1&query=scan path">scan path. Some of the more common types of scan design include the ef="module.php?name=Lexikon&file=search&eid=1&query=multiplexed register">multiplexed register designs and {level-sensitive scan design} (LSSD) used extensively by {IBM}. {Boundary scan} can be used alone or in combination with either of the above techniques. ["Digital Systems Testing and Testable Design" by Abramovici, Breuer, and Friedman, ISBN 0-7167-8179-4]. ["Design of Testable Logic Circuits" by R.G. Bennetts, (Brunel/Southhampton Universities), ISBN 0-201-14403-4]. (1995-02-23)

e="border-width:thin; border-color:#333333; border-style:dashed; padding:5px;" align="left">In addition suitable contents:
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