Specification and Design Language. Defin
ed by the
ITU-T (recommendation Z100) to provide a tool for unambiguous specification and description of the behaviour of telecommunications systems. The area of application also includes process control and real-time applications. SDL provides a Graphic Representation (SDL/GR) and a textual Phrase Representation (SDL/PR), which are equivalent representations of the same semantics. A system is specifi
ed as a set of interconnect
ed abstract machines which are extensions of the
Finite State Machine (FSM). 1. System Software Development Language. System software for the B1700. "System Software Development Language Reference Manual", 1081346, Burroughs Corp (Dec 1974). 2. Specification and Description Language.
ITU-T. Specification language with both graphical and character-bas
ed syntaxes for defining interacting extend
ed finite state machines. Us
ed to specify discrete interactive systems such as industrial process control, traffic control, and telecommunication systems. Proc Plenary Assembly, Melbourne 14-1988-11-25, Fasc X.1, CCITT. "Telecommunications Systems Engineering Using SDL", R. Saracco et al, N-H 1989. Available from Verilog, MD. (See XDL). 3. Shar
ed Dataspace Language. "A Shar
ed Dataspace Language Supporting Large-Scale Concurrency", G. Roman et al, Proc 8th Intl Conf Distrib Comp Sys, IEEE 1988, pp.265-272. 4. Structure Definition Language. Us
ed internally by DEC to define and generate the symbols us
ed for VAX/VMS internal data structures in various languages. 5. System Description Language. language us
ed by the Eiffel/S implementation of Eiffel to assemble clusters into a system. (see Lace).
In addition suitable contents:
[ 2 ] [ = ] [ abstract machine ] [ af ] [ ag ] [ ai ] [ al ] [ am ] [ an ] [ app ] [ application ] [ ar ] [ arc ] [ arg ] [ as ] [ at ] [ av ] [ B ] [ b ] [ ba ] [ base ] [ be ] [ bi ] [ bo ] [ bot ] [ bs ] [ by ] [ C ] [ ca ] [ cat ] [ cc ] [ CCITT ] [ ch ] [ char ] [ character ] [ ci ] [ cl ] [ cluster ] [ co ] [ com ] [ communication system ] [ con ] [ connect ] [ control ] [ cr ] [ cu ] [ cy ] [ D ] [ data ] [ data structure ] [ de ] [ DEC ] [ disc ] [ du ] [ E ] [ ec ] [ ed ] [ ee ] [ eh ] [ Eiffel ] [ er ] [ era ] [ es ] [ et ] [ extend ] [ extension ] [ fi ] [ file ] [ finite ] [ Finite State Machine ] [ fo ] [ for ] [ fr ] [ FS ] [ FSM ] [ G ] [ ge ] [ gen ] [ generate ] [ gh ] [ gi ] [ gn ] [ gr ] [ graph ] [ gu ] [ h ] [ hr ] [ hs ] [ id ] [ IE ] [ ie ] [ IEEE ] [ iff ] [ il ] [ in ] [ inc ] [ include ] [ int ] [ interactive ] [ io ] [ is ] [ IT ] [ it ] [ ITU ] [ ITU-T ] [ la ] [ Lace ] [ language ] [ lb ] [ Lex ] [ li ] [ ls ] [ lu ] [ ly ] [ M ] [ ma ] [ Mac ] [ Mach ] [ machine ] [ man ] [ MD ] [ Mel ] [ mm ] [ mo ] [ mod ] [ module ] [ mp ] [ ms ] [ mu ] [ N ] [ na ] [ nc ] [ ne ] [ nf ] [ ng ] [ ni ] [ nn ] [ ns ] [ nu ] [ om ] [ op ] [ pa ] [ pe ] [ ph ] [ pl ] [ pm ] [ port ] [ porting ] [ PR ] [ pr ] [ process ] [ pt ] [ query ] [ rc ] [ re ] [ real ] [ real-time ] [ rete ] [ ro ] [ ru ] [ S ] [ sa ] [ sam ] [ sc ] [ script ] [ SD ] [ se ] [ semantics ] [ set ] [ si ] [ sig ] [ so ] [ software ] [ space ] [ Spec ] [ spec ] [ specification ] [ st ] [ state ] [ state machine ] [ struct ] [ su ] [ sy ] [ syntax ] [ system ] [ T ] [ text ] [ th ] [ to ] [ tool ] [ tr ] [ tw ] [ ua ] [ ug ] [ up ] [ us ] [ V ] [ va ] [ var ] [ VAX ] [ VAX/VMS ] [ ve ] [ Verilog ] [ vi ] [ VM ] [ VMS ] [ X ] [ XDL ] [ Z ]