The successor to the SuperSPArc processor, based on the SPArcISA. The HyperSPArc has smaller caches than the SuperSPArc: 8kb on-chip and 256kb off-chip (compared with 36kb and 1Mb). The HyperSPArc' s {memory management} is optimised for more efficient out-of-cache addressing which means quicker access to external (slower, cheaper) memory. (1994-11-23)