A memory addressing scheme used in processors where the whole memory can be accessed using a single address that fits in a single register or instruction. This contrasts with a ref="module.php?name=Lexikon&file=search&eid=1&query=segmented memory">segmented memory architecture, such as that used on the ref="module.php?name=Lexikon&file=search&eid=1&query=Intel 8086">Intel 8086, where an address is given by an offset from a base address held in one of the "segment registers". Linear addressing greatly simplifies programming at the {assembly language} level but requires more instruction word bits to be allocated for an address. (1995-02-16)

In addition suitable contents:
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