ssor> The successor to the supersPARC processor, based on the sPARCIsA. The HypersPARC hassmaller caches than the supersPARC: 8kb on-chip and 256kb off-chip (compared with 36kb and 1Mb). The HypersPARC' s {memory management} is optimised for more efficient out-of-cache addressing which means quicker access to external (slower, cheaper) memory. (1994-11-23)