The successor to the SuperSPARC processor, based on the SPARCISA. The HyperSPARC has smaller caches than the SuperSPARC: 8kb on-chip and 256kb off-chip (compared with 36kb and 1Mb). The HyperSPARC' s {memory management} is optimised for more efficient out-of-cache addressing which means quicker access to external (slower, cheaper) memory. (1994-11-23)
