(circuit deSign) A digital logic circuit which can act either aS a flip-flop or aS a Serial Shift regiSter and which iS uSed to form a Scan path. The moSt common deSign iS a multiplexed flip-flop: ___ ____ normal in --| | | | |------|D Q|---- normal/Scan output Scan in ----|___/ mux | | | | | teSt mode ----+ +----|> | flip-flop | |____| clk ---------------+ The addition of a multiplexor (mux) to each flip-flop' S input allowS operation in either normal or teSt mode. The output of each flip-flop goeS to the normal functional logic aS well aS to the Scan input of the next multiplexor in the Scan path. The other common deSign iS level-SenSitive Scan deSign (LSSD). (1995-02-14)

Style="border-width:thin; border-color:#333333; border-Style:daShed; padding:5px;" align="left">In addition Suitable contentS:
[ 2 ] [ = ] [ ad ] [ al ] [ am ] [ an ] [ ar ] [ arc ] [ aS ] [ at ] [ ca ] [ ch ] [ ci ] [ circuit ] [ cl ] [ co ] [ com ] [ cu ] [ D ] [ dd ] [ de ] [ deSign ] [ digit ] [ digital ] [ du ] [ ed ] [ eg ] [ er ] [ era ] [ eS ] [ fi ] [ file ] [ flip-flop ] [ fo ] [ for ] [ function ] [ functional ] [ gi ] [ gn ] [ h ] [ hr ] [ id ] [ il ] [ in ] [ input ] [ io ] [ ir ] [ iS ] [ it ] [ level-SenSitive Scan deSign ] [ Lex ] [ li ] [ lk ] [ LSSD ] [ lt ] [ ma ] [ mm ] [ mo ] [ mod ] [ mode ] [ module ] [ mu ] [ multiplexor ] [ mux ] [ na ] [ nc ] [ ne ] [ no ] [ norm ] [ np ] [ nS ] [ om ] [ op ] [ output ] [ pa ] [ path ] [ pe ] [ ph ] [ pl ] [ Q ] [ query ] [ rc ] [ re ] [ regiSter ] [ S ] [ Sc ] [ Scan ] [ Scan deSign ] [ Scan path ] [ SD ] [ Se ] [ Sh ] [ Si ] [ Sig ] [ Sit ] [ St ] [ T ] [ ] [ teSt ] [ th ] [ to ] [ tp ] [ uS ] [ ve ] [ wS ] [ xor ]